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Patent # Description
US-7,630,566 Method and apparatus for improved estimation and compensation in digital video compression and decompression
A method and apparatus are disclosed for performing motion estimation and compensation to fractional pixel accuracy using polyphase prediction filters as part of...
US-7,630,468 Dual-PLL signaling for maintaining synchronization in a communications system
A communications management system introduces a low bandwidth phase locked loop (LoBW-PLL) working in tandem with a high bandwidth phase locked loop (HiBW-PLL)....
US-7,630,466 Search engine for a receive equalizer
A search engine selects initial coefficients for a receive equalizer. The search engine may be incorporated into a communication receiver that includes a...
US-7,630,461 Low-latency high-speed trellis decoder
A method for decoding a word received at a current time instant into a symbol of a trellis code. The trellis code corresponds to a trellis diagram having N...
US-7,630,446 Apparatus and method for automatic polarity swap in a communications system
An automatic polarity swap is implemented in a communications system. Two or more transceivers having differential inputs and outputs are coupled together...
US-7,630,440 Context adaptive binary arithmetic code decoding engine
Methods and systems for selecting contexts during decoding of arithmetic code are disclosed. Aspects of the method may comprise assigning a plurality of default...
US-7,630,434 High-speed decoder for a multi-pair gigabit transceiver
A method and a system for providing an input signal from a multiple decision feedback equalizer to a decoder based on a tail value and a subset of coefficient...
US-7,630,410 Signal line selection and polarity change of natural bit ordering in high-speed serial bit stream multiplexing...
A bit stream multiplexer and a bit stream demultiplexer of the present invention couples a communication Application Specific Integrate Circuit (ASIC) to a...
US-7,630,357 Synchronization of distributed cable modem network components
A distributed CMTS includes a head end, a downstream transmitter hub, and an upstream receiver hub. The head end transmits data packets to the downstream...
US-7,630,350 Method and system for parsing bits in an interleaver for adaptive modulations in a multiple input multiple...
Aspects of a method and system for parsing bits in an interleaver for adaptive modulations in a multiple input multiple output (MIMO) wireless local area network...
US-7,630,337 Method and system for an improved user group selection scheme with finite-rate channel state information...
Certain embodiments of the invention may be found in a method and system for an improved user group selection scheme with finite-rate channel state information...
US-7,630,331 Power control techniques for wireless devices
Various embodiments are disclosed relating to wireless systems, and also relating to power control techniques for wireless devices. One disclosed embodiment...
US-7,630,306 Dynamic sharing of a transaction queue
A network device for dynamically allocating memory locations to plurality of queues. The network device determines an amount of memory buffers that is associated...
US-7,629,848 Operational amplifier with extended common-mode input range
An operational amplifier is provided with an extended common mode input range. This operational amplifier includes an input stage, a common mode feedback...
US-7,629,681 Ball grid array package with patterned stiffener surface and method of assembling the same
Electrically and thermally enhanced die-up ball grid array (BGA) packages are described. A BGA package includes a stiffener, substrate, a silicon die, and solder...
US-7,627,734 Virtual on-chip memory
A "virtual on-chip memory" that provides advantages as compared to an on-chip memory that utilizes a cache. In accordance with the invention, when a CPU attempts...
US-7,627,720 System and method for directional prefetching
Systems and methods that provide directional prefetching are provided. In one embodiment, a method may include one or more of the following: storing a first...
US-7,627,294 Radio transmitter front-end with amplitude and phase correction and methods for use therewith
A radio transmitter front-end for use in a voice data and RF integrated circuit (IC) includes a phase correction module that produces a phase adjusted signal in...
US-7,627,115 Method and system for implementing the GEA3 encryption algorithm for GPRS compliant handsets
In a wireless communication system, a method and system for implementing the GEA3 encryption algorithm for GPRS compliant handsets are provided. An intermediate...
US-7,627,113 Method and system for hardware accelerator for implementing f8 confidentiality algorithm in WCDMA compliant...
In a wireless communication system, a method and system for hardware accelerator for implementing the f8 confidentiality algorithm in WCDMA compliant handsets...
US-7,627,026 Threshold setting using piecewise linear approximation for channel diagnostic systems
A method and apparatus for detecting faults in cables. The invention comprises computing a plurality of thresholds representing a corresponding plurality of...
US-7,627,025 Echo canceller gain control for channel diagnostic systems
A method and apparatus for detecting faults in cables. The method and apparatus comprise receiving a reflected signal; multiplying an estimation of the reflected...
US-7,626,996 System for detecting collisions in a shared communications medium
A system for detecting collisions in a shared communications medium, such as a TDMA medium, includes a receive path adapted to generate a first intermediate...
US-7,626,994 Multiple node applications cooperatively managing a plurality of packet switched network pathways
End-point devices, access points and other types of network nodes each employ multi-path management software to manage communication via multiple possible paths...
US-7,626,985 Datagram replication in internet protocol multicast switching in a network device
A method of replicating multicast datagrams in a network device is disclosed. The method includes the steps of determining by a memory management unit whether a...
US-7,626,543 GPS device and integrated circuit with an on-chip gyrator
An integrated circuit, for use in a GPS device, includes an on-chip gyrating circuit that generates a motion parameter based on motion of the IC. A global...
US-7,623,830 Auto-calibrating receiver and methods for use therewith
A voice, data and RF integrated circuit includes a processing module that generates at least one control signal that indicates a receive calibration mode. An RF...
US-7,623,658 Method and system for implementing the A5/3 encryption algorithm for GSM and EDGE compliant handsets
In a wireless communication system, a method and system for implementing the A5/3 encryption algorithm for GSM and EDGE compliant handsets are provided. Input...
US-7,623,606 Decoding of bi-phase encoded data
A method for decoding bi-phase encoded data begins by interpreting a first bit boundary of a bit of the bi-phase encoded data to produce a first boundary value....
US-7,623,600 High speed receive equalizer architecture
Equalization is provided in a high speed communication receiver that includes in various aspects an automatic gain control input stage, a decision feedback...
US-7,623,572 Noise variance estimation for frequency domain equalizer coefficient determination
A Radio Frequency (RF) receiver includes a RF front end and a baseband processing module coupled to the RF front end that is operable to determine equalizer...
US-7,623,050 Digital calibration loop for an analog to digital converter
A method and apparatus to counter effects of an offset voltage by calibrating an analog-to-digital converter (ADC). A digital calibration loop minimizes the...
US-7,622,994 Bias circuit with increased power supply rejection
According to one exemplary embodiment, a power supply rejection bias circuit includes a first amplifier coupled to a second amplifier, where the first amplifier...
US-7,622,775 System for ESD protection with extra headroom in relatively low supply voltage integrated circuits
An ESD protection system providing extra headroom at an integrated circuit (IC) terminal pad. The system includes an ESD protection circuit having one or more...
US-7,620,796 System and method for acceleration of streams of dependent instructions within a microprocessor
A system and method for accelerated processing of streams of dependent instructions, such as those encountered in the G.726 codec, in a microprocessor or...
US-7,620,692 iSCSI receiver implementation
Apparatus for receiving a sequence of Transmission Control Protocol (TCP) segments, including a parsing machine which is adapted to parse at least one TCP...
US-7,620,371 Transmitter signal strength indicator
A single chip radio transceiver includes circuitry that enables received wideband RF signals to be down-converted to baseband frequencies and baseband signals to...
US-7,620,099 WCDMA terminal baseband processing module having multi-path scanner module
A baseband processing module according to the present invention includes a multi-path scanner module. The multi-path scanner module is operable to receive timing...
US-7,620,057 Cache line replacement with zero latency
A method for cache management includes assigning a respective cache line in a cache of a processing device to each of a plurality of processing flows in the...
US-7,620,013 Method and system for decoding control channels using repetition redundancy
Methods and systems for decoding control channels using repetition redundancy may include generating enhanced soft bits by combining soft bits generated from the...
US-7,619,997 Beamforming and/or MIMO RF front-end and applications thereof
An RF front-end includes a transmit adjust module, a PA module, an antenna coupling circuit, a LNA module, and a receive adjust module. The transmit adjust...
US-7,618,849 Integrated circuit package with etched leadframe for package-on-package interconnects
Methods, systems, and apparatuses for integrated circuit packages, and for package stacking, are provided. An electrically conductive frame is attached to a...
US-7,617,442 Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having...
Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices. These...
US-7,617,441 Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having...
Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices. These...
US-7,617,439 Algebraic construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having...
Algebraic method to construct LDPC (Low Density Parity Check) codes with parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices. A novel approach...
US-7,617,433 Implementation of LDPC (low density parity check) decoder by sweeping through sub-matrices
Implementation of LDPC (Low Density Parity Check) decoder by sweeping through sub-matrices. A novel approach is presented by which an LDPC coded signal is...
US-7,617,416 System, method, and apparatus for firmware code-coverage in complex system on chip
Presented herein is a system, method, and apparatus for firmware code-coverage in complex system on chip. A circuit for analyzing code coverage of firmware by...
US-7,617,380 System and method for synchronizing translation lookaside buffer access in a multithread processor
A system and method for synchronizing translation lookaside buffer (TLB) access in a multithread processor is disclosed. When a first exception is found while...
US-7,617,342 Universal serial bus dongle device with wireless telephony transceiver and system for use therewith
A universal serial bus (USB) dongle device includes a wireless telephony transceiver that receives an inbound RF signal and that generates inbound data based on...
US-7,617,291 System and method for supporting TCP out-of-order receive data using generic buffer
A method and system for handling received out-of-order network data using generic buffers for non-posting TCP applications is disclosed. When incoming...
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