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Patent # Description
US-7,477,682 Echo cancellation for a packet voice system
An apparatus and methods supporting improved echo cancellation in a packet network is disclosed. An embodiment of the present invention may permit a split-band...
US-7,477,612 Topology discovery process and mechanism for a network of managed devices
A process of discovering a topology of devices on a network is disclosed. A discover frame is sent to nodes in communication with a central processing unit, with...
US-7,477,611 Method and apparatus for performing wire speed auto-negotiation
Auto-negotiation with a communication partner includes downgrading a set of advertised communications capabilities, e.g., IEEE 802.3 capabilities, when a link...
US-7,477,326 HDTV chip with a single IF strip for handling analog and digital reception
Methods and systems for processing television signals are disclosed herein, and may comprise communicating analog and digital intermediate frequency (IF) signals...
US-7,477,283 Integral eye-path alignment on telephony and computer video devices using a pinhole image sensing device
A two-way visual communication device and methods for operating such a device are disclosed. An embodiment of the disclosed invention may comprise a visual...
US-7,477,188 GPS device and integrated circuit with an on-chip gyrator
An integrated circuit, for use in a GPS device, includes an on-chip gyrating circuit that generates a motion parameter based on motion of the IC. A global...
US-7,477,187 Wireless communication device having GPS receiver and an on-chip gyrator
A circuit for use in a wireless communication device includes a on-chip gyrating circuit that generates a motion parameter based on motion of the circuit. A GPS...
US-7,477,100 Method and system for single ended to differential ended demodulation
Provided are a method and system for demodulating a signal. The method includes receiving the signal along first and second signal paths within a demodulator...
US-7,477,047 Register with default control and built-in level shifter
Embodiment of the present invention may provide a switching regulator which may be located within an IC. The switching regulator couples to an external power...
US-7,475,271 Exponential channelized timer
A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with a channelized timer for use in...
US-7,475,243 Preventing a non-head end based service provider from sending media to a media processing system
Systems and methods that prevent unauthorized access in a communications network are provided. In one embodiment, a system that prevents unauthorized access to a...
US-7,475,176 High bandwidth split bus
A system includes a first bus segment and a second bus segment. The first bus segment is operatively coupled to one or more first bus agents, where the first bus...
US-7,475,173 Integrated disc drive controller
An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete...
US-7,474,880 Linear and non-linear dual mode transmitter
A transmitter includes a dual mode modulator and an amplifier coupled to the dual mode modulator. The dual mode modulator implements a linear modulation scheme...
US-7,474,713 System and method for demodulating multiple QAM signals
A system and method demodulate N QAM signals (N being a positive integer equal to or greater than 1) substantially simultaneously using, for example, one or two...
US-7,474,709 Frequency shift keying modulator and applications thereof
An FSK modulator and applications thereof are disclosed. The FSK modulator comprises a phase-locked loop, a frequency divider module, an image rejection mixer...
US-7,474,695 Equalization and decision-directed loops with trellis demodulation in high definition TV
Improved decision feedback equalizer and decision directed timing recovery systems and methods suitable for use in connection with a dual mode QAM/VSB receiver...
US-7,474,487 Read/write timing generator and methods for use therewith
A read/write timing generator includes a read/write signal generator for generating a read/write signal in response to the media event trigger of a disk drive...
US-7,474,151 Active load with adjustable common-mode level
A differential preamplifier includes an active load with adjustable common-mode output level. The active load includes a transistor pair, a resistor pair, and a...
US-7,472,335 Symbol by symbol variable code rate capable communication device
Symbol by symbol variable code rate capable communication device. A communication device is operable to perform processing of a variable code rate signal whose...
US-7,472,318 System and method for determining on-chip bit error rate (BER) in a communication system
A method and system for evaluating performance of a device by on-chip determination of BER may include establishing and generating PRBS test packets in a closed...
US-7,472,151 System and method for accelerating arithmetic decoding of video data
Presented herein is a system and apparatus for accelerating arithmetic decoding of encoded data. In one embodiment, there is presented a symbol interpreter for...
US-7,472,150 Method and system for time sharing N consecutive half-band decimating-by-2-filters using a single filter
A method and system for time sharing N consecutive half-band decimating-by-2-filters using a single filter. Aspects of the method may comprise selecting a...
US-7,472,057 Detector for use in voice communications systems
One or more methods and systems of detecting or identifying one or more types of algorithms used in the encoding of a voice or speech waveform is presented. The...
US-7,472,055 Method and system for deterministic control of an emulation
An emulation-based event-wait simulator including an application module to configure and command verification processes on a design under test (DUT). An event...
US-7,472,054 Method and system for deterministic control of an emulation
An emulation-based event-wait simulator including an application module to configure and command verification processes on a design under test (DUT). An event...
US-7,471,941 Amplifier assembly including variable gain amplifier, parallel programmable amplifiers, and AGC
An amplifier assembly receives an input signal including multiple frequency channels. A first stage amplifier amplifies the input signal, to produce at an output...
US-7,471,934 Transmitter method, apparatus, and frequency plan for minimizing spurious energy
A translational-loop transmitter includes a local oscillator (LO) generator for generating first and second LO signals, a modulator for generating a modulated...
US-7,471,741 Method, apparatus and system for high-speed transmission on fiber optic channel
Multi-carrier modulation fiber optic systems constructed using a series of electrical carriers, modulating the data on the electrical carriers and combining the...
US-7,471,737 Hardware efficient FSK demodulator
A radio frequency (RF) transmitter includes a digital radio processor and a baseband processor. A complex analog-to-digital converter (ADC) within the radio...
US-7,471,731 PHY sub-channel processing
Physical layer (PHY) sub-channel processing. A soft symbol decision stream is arranged into a number of sub-channels to reduce substantially the processing...
US-7,471,694 Method and system for channel estimation in a single channel (SC) multiple-input multiple-output (MIMO) system...
In a wireless system, a method and system for channel estimation in a single channel MIMO system comprising two-transmit and multiple-receive antennas for...
US-7,471,691 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in...
A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each...
US-7,471,651 Transaction control system including portable data terminal and mobile customer service station
A mobile customer service station operating within a wireless multi-hop communication network includes a console on a wheeled chassis. The console carries and...
US-7,471,481 Method for establishing and maintaining radial position for hard disk drive self servo write without seed wedges
Magnetic reference patterns may be generated on a disk or other magnetic media without the need for seed wedges. This involves writing a first magnetic reference...
US-7,471,342 Method and system for cross-luminance reduction in multi-standard television decoders
A method and system for correcting luma data and chroma data from a composite signal for a plurality of lines are disclosed. The method and system include...
US-7,471,253 Radio transceiver communicating in a plurality of frequency bands
The present invention relates generally to computer devices utilizing removable radio frequency communication devices used for transmitting and receiving...
US-7,471,204 Receiver architecture for canceling blocking signals
A receiver architecture for canceling blocking signals in the receive path includes a low noise amplifier for receiving and amplifying an inbound RF signal to...
US-7,471,142 Filter calibration with cell re-use
Various embodiments are disclosed relating filter calibration with cell re-use. According to an example embodiment, an apparatus includes a first circuit,...
US-7,471,127 Linear charge pump for fractional synthesis using an auxiliary charge pump
A charge pump in a PLL incorporates interlinked first and second charge pumps that inject or withdraw a charge from a loop filter. The charge is proportional to...
US-7,471,120 Clock switch for generation of multi-frequency clock signal
An improved clock switch in an integrated circuit chip that multiplexes two asynchronous clock signals to generate a multi-frequency clock signal in a manner...
US-7,469,373 Application of a Meta-Viterbi algorithm for communication systems without intersymbol interference
Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a...
US-7,469,368 Method and system for a non-volatile memory with multiple bits error correction and detection for improving...
A method and system for a non-volatile memory (NVM) with multiple bits error correction and detection for improving production yield are provided. Forward error...
US-7,469,338 System and method for cryptographic control of system configurations
Systems and methods are disclosed for using cryptographic techniques to configure data processing systems. A configuration manager cryptographically controls the...
US-7,469,310 Network switch architecture for processing packets independent of media type of connected ports
A network device for handling data and a method for handling data in a network device includes at least one media port and at least one high speed docking...
US-7,469,275 System having interfaces, switch, and memory bridge for CC-NUMA operation
A node comprises at least an interconnect, one or more coherent agents coupled to the interconnect, and a memory bridge coupled to the interconnect. The memory...
US-7,469,150 Radio card having independent antenna interface supporting antenna diversity
A radio card, such as a PCMCIA card, received by an electronic device has a first interface coupling radio circuitry within the radio card to the electronic...
US-7,469,137 Radio receiver DC offset cancellation via ADC input bias
A scaled input current is produced that substantially matches the full scale input of a CT.DELTA..SIGMA.ADC that substantially cancels an offset bias current...
US-7,469,012 System and method for transcoding entropy-coded bitstreams
A system and method for transcoding an entropy-coded bitstream is presented herein. The syntax elements of the entropy-coded bitstream are decoded and transcoded...
US-7,468,992 Voice and data exchange over a packet based network with DTMF
A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a...
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