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Patent # Description
US-7,457,420 Method and system for detecting signal modes in a broadcast audio transmission
A Japanese BTSC audio broadcast signal has three modes of transmission: mono, stereo, or dual mono. The control channel centering at 3.5 fH is one of the three...
US-7,457,380 Low noise circuit and applications thereof
A low noise circuit includes a clocked circuit and an impedance trap circuit. The clocked circuit includes a clock input, an input, an output, a power supply...
US-7,457,379 Adaptive multi-step combined DC offset compensation for EDGE 8-PSK
A method to perform DC compensation on a Radio Frequency (RF) burst transmitted between a servicing base station and a wireless terminal in a cellular wireless...
US-7,457,364 Subdimensional single-carrier modulation
A method for modulating a sequence of data symbols such that the transmit signal exhibits spectral redundancy. Null symbols are inserted in the sequence of data...
US-7,457,352 Cancellation of interference in a communication system with application to S-CDMA
Cancellation of interference in a communication system with application to S-CDMA. A relatively straight-forward implemented and computationally efficient...
US-7,457,351 Cancellation of interference in a communication system with application to S-CDMA
Cancellation of interference in a communication system with application to S-CDMA. A relatively straight-forward implemented and computationally efficient...
US-7,457,148 Compact and highly efficient DRAM cell
A compact dynamic random access memory (DRAM) cell and highly efficient methods for using the DRAM cell are disclosed. The DRAM cell provides reading, writing,...
US-7,456,764 Analog to digital converter with dynamic power configuration
In an embodiment, an analog to digital converter (ADC) has a dynamic power circuit. The ADC has a track-and-hold circuit with an output and a track mode. The ADC...
US-7,456,761 Interspersed training among encoded blocks of data within a data frame
A communications system, having a combination Reed-Solomon encoder and a Turbo-Code encoder Data frame configuration which may be changed to accommodate embedded...
US-7,456,690 Automatic gain control using multi-comparators
A method and apparatus for an automatic gain control (AGC) loop that utilizes multiple comparators to provide constant bandwidth tracking and step response, as...
US-7,454,610 Security association updates in a packet load-balanced system
Methods and associated systems for providing secured data transmission over a data network are disclosed. Security association updates may be provided in a...
US-7,454,189 Calibration of received signal strength indication
Calibration of received signal strength indication (RSSI) within a radio frequency integrated circuit (RFIC) begins by concurrently enables a transmitter portion...
US-7,454,183 Method and system for antenna selection diversity with dynamic gain control
A method and system for antenna selection diversity with dynamic gain control. A receiver selects a starting antenna and dwells on it until an incoming signal is...
US-7,454,081 Method and system for video edge enhancement
A system and method that enhance edges in images by detecting and correcting edges of the components of the image, such as the luma and the chroma components....
US-7,453,943 Hybrid circuit for broadband modems
A hybrid circuit that decouples gains for a transmit signal and a receive signal of a broadband modem that is coupled to a telephone line is provided. The hybrid...
US-7,453,935 Multi-pair gigabit ethernet transceiver having decision feedback equalizer
Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver...
US-7,453,839 Wireless local area network channel resource management
A wired Local Area Network (wired LAN) and a plurality of Wireless Access Points (WAPs) coupled to a wired network infrastructure of the wired LAN service...
US-7,453,761 Method and system for low cost line buffer system design
Various aspects of the low cost line buffer system allow a reduction in circuitry versus conventional approaches to line buffer design. A plurality of line...
US-7,451,386 LDPC (Low Density Parity Check) coded modulation hybrid decoding
LDPC (Low Density Parity Check) coded modulation hybrid decoding. A novel approach is presented wherein a combination of bit decoding and symbol level decoding...
US-7,451,362 Method and system for onboard bit error rate (BER) estimation in a port bypass controller
Certain aspects of the method may comprise receiving via a first port of the port bypass controller, a data stream comprising at least one known bit pattern....
US-7,451,335 Selectively disabling a portion of ASF operations when ASF device is powered by auxiliary power
Techniques are disclosed for providing system manageability for computing systems operating under OS-absent conditions. In particular, techniques are disclosed...
US-7,451,245 System for dual use of an I/O circuit
A system provides dual use of a general purpose input/output (I/O) line. In an embodiment, the system comprises a controlling circuit having a dual purpose I/O...
US-7,451,235 Dynamic delta encoding for cable modem header suppression
A method and computer program product for recognizing and optimizing the transmission of TCP/IP style traffic across a DOCSIS network. According to the method of...
US-7,450,900 Method and system for cellular network and integrated broadcast television (TV) downlink with intelligent...
A method and system for communicating information via a plurality of different networks may comprise requesting in a mobile terminal capable of receiving and...
US-7,450,715 Transceiver for bidirectional frequency division multiplexed transmission
The present invention relates to a transceiver for bidirectional frequency division multiplexed transmission, a communication system including one or more...
US-7,450,676 Synchronization of data links in a multiple link receiver
A dual link receiver terminates, recovers, channel aligns, and link aligns a plurality of primary link channels and a plurality of secondary link channels. The...
US-7,450,674 Method and apparatus for diversity combining and co-channel interference suppression
Systems and methods for processing received signals are disclosed and may include determining, for each block of data in a received frame, diversity combining...
US-7,450,635 Single antenna interference cancellation within a wireless terminal
The present invention provides a multi-branch equalizer processing module operable to cancel interference associated with received radio frequency (RF) burst(s)....
US-7,450,617 System and method for demultiplexing video signals
The present invention is directed to a system and method for demultiplexing video signals that have been combined using a time division multiplexing approach....
US-7,450,606 Bit slice arbiter
An arbiter circuit is provided for resolving a plurality of N request signals received from a plurality of agents requesting access to a resource. The arbiter...
US-7,450,579 Downstream synchronous multichannels for a communications management system
Downstream synchronous multichannel (DSSM) communications are provided among a plurality of carriers, each being a completely DOCSIS.TM. 2.0-compliant...
US-7,450,530 Cross link multiplexer bus configured to reduce cross-talk
A cross link multiplexer bus comprising a plurality of cross link multiplexers and a plurality of interconnects. The plurality of cross link multiplexers has a...
US-7,450,529 Cross link multiplexer bus
A cross link multiplexer bus comprising a plurality of cross link multiplexers and a plurality of interconnects. The plurality of cross link multiplexers has a...
US-7,450,518 Sparse channel dual-error tracking adaptive filter/equalizer
An adaptive filter has a plurality of filter coefficients and a filter coefficients processing unit trains of the adaptive filter. The filter coefficients...
US-7,450,509 Adaptive flow control method and apparatus
The present invention provides a method of controlling data flow within a network device. The method includes the steps of snooping a data packet before the data...
US-7,450,501 Media processing system based on satellite set top box platform with telephony downstream and upstream data paths
Systems and methods that provide satellite-based media processing are described. In one embodiment, a system that exchanges media may include, for example, a...
US-7,450,500 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in...
A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each...
US-7,449,964 System and method for tuning output drivers using voltage controlled oscillator capacitor settings
The present invention provides a method for tuning output drivers to an operating frequency based on settings used to tune other devices within the device such...
US-7,449,963 Apparatus and method for phase lock gain control using unit current sources
A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel...
US-7,449,908 Process monitor for monitoring an integrated circuit chip
A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to...
US-7,449,901 Grounding scheme for high speed probing with reduced loop area
A grounding scheme for improved high speed probing of a system-under-test ("SUT") using a ground rail positioned on the SUT near each side of a package attached...
US-7,449,872 Low-power programmable low-drop-out voltage regulator system
A low-power programmable low-drop-out voltage regulator system and methods are presented. The regulator includes a local reference generator circuit that...
US-7,449,365 Wafer-level flipchip package with IC circuit isolation
Forming a wafer level chip scale flip chip package includes determining isolation requirements of an integrated circuit formed in a semi conductive substrate...
US-7,448,013 Method and apparatus for facilitating circuit design
There is disclosed a system for designing circuits which involves pre-placing delay elements between circuit components susceptible to shoot-through due to...
US-7,447,985 Efficient design to implement min**/min**- or max**/max**- functions in LDPC (low density parity check) decoders
Efficient design to implement min**/min**- or max**/max**- functions in LDPC (Low Density Parity Check) decoders. When compared to prior art approaches, the...
US-7,447,984 System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity...
System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave. A novel...
US-7,447,981 System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity...
System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave. A novel...
US-7,447,902 Method for processing multiple wireless communications security policies
A method for processing wireless data packets allows for processing packets allows consolidation of security processing. Security processing is performed in...
US-7,447,372 System(s), method(s), and apparatus for decoding exponential Golomb codes
Presented herein are system(s), method(s), and apparatus for decoding exponential Golomb codes. In one embodiment, there is presented a system for decoding codes...
US-7,447,275 IF FSK receiver
In one embodiment, the present invention is a low-power, and high performance receiver including an IF demodulator for high data rate, frequency modulated...
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