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Patent # Description
US-7,359,332 Enhanced DOCSIS upstream channel changes
Enhanced DOCSIS upstream channel changes. A CMTS directs channel changing of a CM, sometimes between upstream data bursts. Logical channels, part of a single...
US-7,359,170 RF circuit electrostatic discharge protection
A padring formed on a semi conductive substrate die provides Electro Static Discharge (ESD) protection for a Radio Frequency (RF) circuit also formed on the semi...
US-7,359,005 Method and system for component sync detection and alignment
In a method and system for component sync detection and alignment, the Y/G channel is used as a master channel from which the vertical and the horizontal syncs...
US-7,358,782 Frequency divider and associated methods
The present invention relates to frequency dividers. The frequency divider comprises an input, a counter, a first comparator, an interconnect, and an output. The...
US-7,358,779 Amplitude compensation circuit with programmable buffers
According to one exemplary embodiment, an amplitude compensation circuit includes a first composite programmable buffer for receiving a first input signal with a...
US-7,356,350 Method and apparatus for generating clocks for a handheld multistandard communication system
Methods and apparatus for generating clocks for a handheld multistandard communication system are disclosed herein and may comprise receiving an input clock...
US-7,356,325 Local oscillation routing plan applicable to a multiple RF band RF MIMO transceiver
Local oscillation circuitry for use in an RF transceiver Integrated Circuit (IC) includes local oscillation generation circuitry operable to produce a local...
US-7,356,310 Adaptive radio transceiver with floating MOSFET capacitors
An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local...
US-7,356,309 Directional coupler for communication system
An improved directional coupler that significantly reduces the signal degradation problems associated with distortion caused by circuit elements used to measure...
US-7,356,087 Bit mapping for variable-size higher-order digital modulations
Mapping of m input bits to 2.sup.m modulation symbols of a two-dimensional symbol constellation. A quarter-quadrant constellation of 2.sup.m-4 modulation symbols...
US-7,356,076 System and method supporting auto-recovery in a transceiver system
A method and apparatus are disclosed to aid a transceiver chip, in a serial data communications system, in recovering from a system-side, out-bound data clocking...
US-7,356,051 Digital visual interface with audio and auxiliary data cross reference to related applications
One embodiment of the present invention uses an abbreviated blanking period, in comparison to the standard VESA and CEA-EIA blanking periods, in order to send...
US-7,355,987 Multi-rate, multi-port, gigabit SERDES transceiver
A multi-port Serdes transceiver includes multiple parallel ports and serial ports, and includes the flexibility to connect any one of the parallel ports to...
US-7,355,970 Method and apparatus for enabling access on a network switch
A data switch for network communications includes a data port interface which supports at least one data port which transmits and receives data. The switch also...
US-7,355,651 Method and system for minimizing both on-chip memory size and peak DRAM bandwidth requirements for multifield...
In a video system, a method and system for minimizing both on-chip memory size and peak DRAM bandwidth requirements for multi-field deinterlacers are provided....
US-7,355,485 Apparatus and method for phase lock loop gain control using unit current sources
A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel...
US-7,353,168 Method and apparatus to eliminate discontinuities in adaptively filtered signals
A method to eliminate discontinuities in an adaptively filtered signal includes filtering a beginning portion of a current signal frame using a past set of...
US-7,352,775 Partial duplex frequency domain modulator system and method
In a multi-carrier transmission scheme (frequency domain multiplexed--FDM), a single high rate data stream is split into multiple lower rate data streams each...
US-7,352,765 Packet switching fabric having a segmented ring with token based resource control protocol and output queuing...
A packet switching fabric includes means forming a data ring, means forming a control ring, and means forming a plurality of data communication network links...
US-7,352,720 System and method to determine a bit error probability of received communications within a cellular wireless...
RF communications received by a wireless terminal from a servicing base station are used to determine the BEP. These RF communications may be in the form of RF...
US-7,352,411 Digital IF demodulator
A digital IF demodulator includes an analog-to-digital (A/D) converter that receives an analog IF signal and converts it to a digital IF signal. A parallel...
US-7,352,215 High speed latch comparators
In a latch circuit having a bistable pair of cross connected transistors of a first polarity and a third transistor of a second polarity, a current signal...
US-7,352,214 System and method for clock detection with glitch rejection
A system and a method are presented for detecting the presence of at least one clock signal of a defined clock frequency applied to at least one input port of an...
US-7,350,130 Decoding LDPC (low density parity check) code with new operators based on min.sup.* operator
Decoding LDPC (Low Density Parity Check) code with new operators based on min* operator. New approximate operators are provided that may be employed to assist in...
US-7,350,121 Programmable embedded logic analyzer in an integrated circuit
A logic analyzer having internal access to the test buses, clocks and events of a chip is used to debug the chip. The logic analyzer is designed with the...
US-7,350,057 Scalar result producing method in vector/scalar system by vector unit from vector results according to modifier...
Described herein is a method and system for executing instructions. The system comprises a scalar unit for executing scalar instructions each defining a single...
US-7,349,680 Method and system for using PSK sync word for fine tuning frequency adjustment
In RF transceivers, a method and system for using phase shift key (PSK) sync word for fine tuning frequency adjustment are provided. One aspect of the invention...
US-7,349,677 Hardware efficient RF transceiver I/Q imbalance compensation based upon taylor approximation
Radio transceiver circuitry includes I/Q imbalance compensation logic within at least one of a digital modulator or a digital demodulator, depending upon whether...
US-7,349,673 Adaptive radio transceiver with an antenna matching circuit
An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local...
US-7,349,499 Accurate signal detection in a wireless environment
A method for accurate signal detection begins by receiving a radio frequency signal, which is then converted into baseband signals. The processing then continues...
US-7,349,492 Method, apparatus and system for high-speed transmission on fiber optic channel
Multi-carrier modulation fiber optic systems constructed using a series of electrical carriers, modulating the data on the electrical carriers and combining the...
US-7,349,450 Multi-stage high speed bit stream demultiplexer chip set having switchable master/slave relationship
A bit stream demultiplexer that couples a high-speed bit stream media to a communication Application Specific Integrated Circuit (ASIC). The bit stream...
US-7,349,437 System and method for hardware based reassembly of a fragmented packet
A system and method for hardware based reassembly of a fragmented packet is shown. The method includes receiving a bandwidth request to transfer a data packet...
US-7,349,428 Data alignment of the packetized elementary streams in the coded data buffer for dual decode
Presented herein is a scheme for processing multilayered packets. In one embodiment, an application engine aligns a lower level packet header with data objects...
US-7,349,423 System and method for the reuse of S-CDMA parameters to define TDMA minislot size
A system and method is presented for reuseing its S-CDMA related hardware (e.g., timestamp, minislot and frame count hardware) to create an extended mode to...
US-7,349,394 Filtering and forwarding frames at an optical line terminal
An optical line terminal (OLT) monitors and controls communications with a plurality of optical nodes (ONs), such as optical network units (ONUs) and/or optical...
US-7,349,028 Method and system for motion adaptive deinterlacer with integrated directional filter
A system and method that produces a spatial average for interlaced video in a deinterlacer. The system detects edges in the video images and determines the angle...
US-7,349,026 Method and system for pixel constellations in motion adaptive deinterlacer
In a video system, a method and system for pixel constellation in a motion detection deinterlacer are provided. An output pixel in an absent line of a current...
US-7,348,838 Method and system for DC offset cancellation from a modulated signal
Provided are a method and system for removing an offset direct current (DC) component from an input waveform. The method includes multiplying the input waveform...
US-7,348,820 Method and apparatus for glitch-free control of a delay-locked loop in a network device
A method of controlling a delay-locked loop (DLL) module is disclosed. The method includes the steps of receiving a clock signal, comparing the received clock...
US-7,346,788 Method and system for monitoring module power information in a communication device
Methods and systems for monitoring operating status of a device are provided. Aspects of the method may include receiving within a chip, a signal indicative of a...
US-7,346,763 Processor instruction with repeated execution code
The present invention relates to a design of a computer system that processes instructions with a specific operation code causing the processor to execute a...
US-7,346,701 System and method for TCP offload
Aspects of the invention may comprise receiving an incoming TCP packet at a TEEC and processing at least a portion of the incoming packet once by the TEEC...
US-7,346,129 Payload based channel estimation of a wireless channel
A method for payload-based channel estimation of a wireless channel begins by receiving a frame via the wireless communication channel. The frame includes a...
US-7,346,082 High-speed serial bit stream multiplexing and demultiplexing integrated circuits
A multiple bit stream interface interfaces a first transmit data multiplexing integrated circuit and a second transmit data multiplexing integrated circuit. The...
US-7,346,078 Processing of received data within a multiple processor device
A multiple processor device stores a stream of data as a plurality of data segments, which includes multiplexed data fragments from at least one of a plurality...
US-7,346,063 Memory management unit for a network switch
A network switch having at least one port data port interface, a first memory, a second memory, and a memory management unit in connection with the at least one...
US-7,346,055 Method and system for co-relating transport packets on different channels using a unique packet identifier
Aspects of the present invention may include replicating a first primary packet to create a second primary packet for a particular channel. A unique identifier...
US-7,346,054 Method and system for co-relating transport packets on different channels using a cyclic redundancy check (CRC)
A first primary packet to create a second primary packet for a particular PID. Different CRC checksum may be generated for the first and the second primary...
US-7,345,490 Filter calibration
A method for calibrating a filter begins with the filter filtering a first signal having a first frequency to produce a first filtered signal, wherein the first...
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