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Centralized switching fabric scheduler supporting simultaneous updates
A system for servicing data transactions within a processing device using common data paths. The system is broadly comprised of: a plurality of source agents...
Resistor ladder interpolation for PGA and DAC
A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps...
Apparatus and method for phase lock loop gain control using unit current
A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel...
Low-power supply voltage level detection circuit and method
An input power supply voltage level detection circuit and method are presented. The circuit includes a main detector core and a two-inverter buffer block that...
Flip chip package including a non-planar heat spreader and method of
making the same
A flip chip package generally includes a substrate, a flip chip die, and a heat spreader. The flip chip die is coupled to the substrate. The heat spreader is...
Inhibiting of a co-issuing instruction in a processor having different
A processor is described which includes a first pipeline, a second pipeline, and a control circuit. The first pipeline includes a first stage at which...
Memory controller configurable to allow bandwidth/latency tradeoff
A memory controller includes a plurality of channel control circuits. Each of the plurality of channel control circuits is coupled to a respective one of a...
Ambiguous virtual channels
An apparatus comprises a first plurality of buffers configured to store operations belonging to a first virtual channel and a control circuit coupled to the...
Frame format for high data throughput wireless local area network
A frame format for high data throughput wireless local area network transmissions includes a first preamble segment, a second preamble segment, and a variable...
Tunable transceiver front end
A transceiver front end includes a transmit/receive (T/R) switch, a first balun, a second balun, a low noise amplifier, a power amplifier, and compensation...
Adaptive motion detection and control
A motion detector (300) detects motion of images represented by video pixels by providing a memory (19) arranged to store first pixels processed during a first...
Discrete multitone transmission and reception
Discrete multitone transmission assigns bits to tones for transmission. The bits are assigned using permutations of bits and tones that cycle through a sequence...
System and method for connecting bluetooth-enabled devices to a personal
An interface which effects communication between first and second systems and includes a first arrangement for communicating with the first system using a first...
Compensating a power amplifier based on operational-based changes
A method for compensating a power amplifier based on operational-based changes begins by measuring one of a plurality of operational parameters of the power...
Method and apparatus for a linear transconductance device
A transconductance device has substantially linear characteristics. The transconductance device includes a differential pair that receives a differential input...
Method and system for providing a power-on reset pulse
Provided are a method and system for providing a power-on reset pulse. The system includes a level detector configured to receive an input signal and produce, at...
System and method for compensating for the effects of process, voltage,
and temperature variations in a circuit
A system and method for compensating for process, voltage, and temperature variations in a circuit is provided. A system includes an inverter having an input...
Method and apparatus for retiming in a network of multiple context
A method and an apparatus for retiming in a network of multiple context processing elements in a network of multiple context processing elements are provided. A...
There is disclosed a technique for accessing a register file which comprises defining a first register address as a plurality of bits and using said first...
System having interfaces, switch, and memory bridge for CC-NUMA operation
A node comprises at least an interconnect, one or more coherent agents coupled to the interconnect, and a memory bridge coupled to the interconnect. The memory...
Device for selective power management for a hand held host
A hand held radio host includes circuitry for selectively providing power to radiating transceiver elements and non-radiating application elements according to a...
Reduced local oscillator feedthrough quadrature image reject mixer
An RF communications circuit having a reduced LO feed through image reject mixer is disclosed. The image reject mixer includes a quadrature phase ...
Transconductance / C complex band-pass filter
A complex filter such as the channel select filter in a radio transceiver is implemented using a transconductance/C topology to benefit from the ability to tune...
Multi-mode crystal oscillator
In one embodiment of the present invention, two crystal oscillator circuits are coupled in parallel to provide differing performance according to mode....
Fully differential CMOS phase-locked loop
The present invention relates in general to integrated circuits, and in particular to method and circuitry for implementing an improved phase-locked loop (PLL)...
Phase interpolater and applications thereof
A phase interpolator includes a plurality of clock phase input sections, a plurality of clock phase switching sections, a plurality of current sources and a...
FSK demodulator slicer with fast automatic DC offset compensation
A data slicer for an FSK demodulator employs a peak and valley detector, each of which has a discharge path with selectable decay rates. The faster decay rate...
PHY sub-channel processing
Physical layer (PHY) sub-channel processing. A soft symbol decision stream is arranged into a number of sub-channels to reduce substantially the processing...
Dynamic network load balancing over heterogeneous link speed
A method, apparatus, and computer program product for balancing transmission unit traffic over network links, including disposing transmission units into flows;...
Method and system for detecting digital QAM, VSB and analog TV signals
A method and system is provided, which may detect digital QAM, VSB and analog TV signals in a faster and more efficient manner than conventional systems. The...
Method of RFIC die-package configuration
A method for packaging a radio frequency integrated circuit (RFIC) in multiple packages begins by determining a 1.sup.st position of the RFIC die in a 1.sup.st...
System and method having strapping with override functions
A system and method allow for overriding of a strapping option. A strapping signal places a device (e.g., a processor) in first state or mode (e.g., client or...
System and method of manipulating a system time clock in an audio/video
Systems and methods that manipulate a system time clock in an audio decoding system and/or a video decoding system are disclosed. In one example, the method may...
High frequency loss of signal detector
Methods and circuitry for implementing high speed loss-of-signal detectors for use in Gb/s telecommunication applications. The invention measures bit error rate...
Reduced-complexity antenna system using multiplexed receive chain
A method and associated system for processing a plurality of replicas of a signal in a signal processing chain, the method includes receiving each of the...
Ethernet transceiver with single-state decision feedback equalizer
Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver...
Fast computation of coefficients for a variable delay decision feedback
Optimal Decision Feedback Equalizer (DFE) coefficients are determined from a channel estimate by casting the DFE coefficient problem as a standard recursive...
Voice activity detection based on far-end and near-end statistics
Methods and apparatus of managing a communication system, wherein a decision regarding a level of activity at a first end is made based at least in part on the...
Integrated circuit chip having non-volatile on-chip memories for providing
programmable functions and features
An integrated circuit chip having programmable functions and features in which one-time programmable (OTP) memories are used to implement a non-volatile memory...
System and method for aligned compression of interlaced video
A method and system are disclosed for vertically phase shifting fields of at least one interlaced frame of video into at least two vertically aligned frames of...
Adaptable voltage control for a variable gain amplifier
A method and apparatus for adaptively controlling a variable gain amplifier (VGA). The operation of the VGA is separated into a low gain mode and a high gain...
System and method for adjusting the phase of a frequency-locked clock
A clock signal regeneration system and method to adjust the phase of a frequency-locked clock signal is provided. The system includes a numerically controlled...
A differential comparator with improved bit-error rate performance operating with a low supply voltage. The differential comparator includes a first pair of...
Increased yield manufacturing for integrated circuits
A system and method for providing increased manufacturing yield for integrated circuits. Various aspects of the invention may comprise receiving an integrated...
Physical layer loop back method and apparatus
The network device includes a transceiver, a pattern generation unit and a pattern recognition unit. The transceiver connects to a communications medium. The...
Method and apparatus for high speed table search
A table searching system for facilitating high speed linear searching of a table of information by a plurality of searching agents is provided. The system...
Apparatus for controlling and monitoring a wireless hotspot through an
interface with a cellular telephone network
A process of controlling and monitoring a wireless hotspot by a wireless service provider is disclosed. Data is received from an access point of a wireless...
Variable-gain low noise amplifier for digital terrestrial applications
A multi-stage amplifier assembly configured to receive a terrestrial digital television ("DTV") input signal including multiple frequency channels. The amplifier...
Bluetooth fast connection mode for wireless peripheral device
A wireless interface device services communications between a wirelessly enabled host and at least one user input device. The wireless interface device includes...
Systems for synchronizing resets in multi-clock frequency applications
Methods and systems for synchronizing a reset signal with a local clock that drives a circuit. In the circuit, the reset signal can be used to reset one or more...