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Patent # Description
US-7,215,700 Cancellation of interference in a communication system with application to S-CDMA
Cancellation of interference in a communication system with application to S-CDMA. A relatively straight-forward implemented and computationally efficient...
US-7,215,218 Balun transformer with means for reducing a physical dimension thereof
The invention is a balun transformer that converts a single-ended (or unbalanced) signal to a differential (or balanced) signal. The balun is a printed metal...
US-7,215,199 Method and system for simplifying common mode feedback circuitry in multi-stage operational amplifiers
A method for simplifying common mode feedback circuitry utilized in multi-stage operational amplifiers may comprise generating a first differential output signal...
US-7,215,171 Digitally controlled threshold adjustment circuit
A threshold adjustment circuit including: a current DAC for supplying or sinking a varying current; a differential pair of thin oxide transistors coupled to the...
US-7,215,169 Current-controlled CMOS logic family
Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C.sup.3MOS) logic fabricated in conventional CMOS process...
US-7,215,153 Fully differential input buffer with wide signal swing range
An input buffer for use in a differential operational amplifier is disclosed that regulates current through a main input differential pair while preventing...
US-7,213,166 In-place data transformation for fault-tolerant disk storage systems
A fault tolerant method transforms physically contiguous data in-place on a disk by partitioning the physically contiguous data into an empty region physically...
US-7,212,806 Location-based transaction authentication of wireless terminal
A wireless terminal implements location-based transaction authentication and includes a wireless interface, a user interface, a Global Positioning System (GPS)...
US-7,212,801 Electrostatic protection circuit with impedance matching for radio frequency integrated circuits
An electrostatic-discharge/impedance-matching circuit for use in radio frequency (RF) integrated circuits. The electrostatic-discharge/impedance-matching circuit...
US-7,212,586 Direct conversion RF transceiver for wireless communications
A single chip radio transceiver includes circuitry that enables received wideband RF signals to be down converted to base band frequencies and base band signals...
US-7,212,534 Flow based congestion control
A method for selectively controlling the flow of data through a network device is discussed. The network device has a plurality of ports, with each port of the...
US-7,212,142 Methods and systems for high speed quantizers
Methods and systems for improved feedback processing in delta-sigma modulators, including single bit and multi-bit delta-sigma modulators, continuous-time and...
US-7,212,043 Line regulator with high bandwidth (BW) and high power supply rejection ration (PSRR) and wide range of output...
Aspects of a method and system for a linear regulator with high bandwidth, PSRR, and a wide range of output current are provided. A method for isolating voltages...
US-7,211,843 System and method for programming a memory cell
The present invention relates to systems and methods for programming a memory cell. More specifically, the present invention relates to a controlled application...
US-7,210,092 Symbol by symbol variable constellation type and/or mapping capable communication device
Symbol by symbol variable constellation type and/or mapping capable communication device. A communication device is operable to perform processing of a variable...
US-7,210,057 Low-speed DLL employing a digital phase interpolator based upon a high-speed clock
A low-speed DLL facilitates a deskewed interface between a high-speed RX data demultiplexer circuit directly to an Application Specific Integrated Circuit (ASIC)...
US-7,209,992 Graphics display system with unified memory architecture
A graphics display system integrated circuit is used in a set-top box for controlling a television display. The graphics display system processes analog video...
US-7,209,878 Noise feedback coding method and system for efficiently searching vector quantization codevectors used for...
A system for performing a computationally efficient method of searching through N Vector Quantization (VQ) codevectors for a preferred one of the N VQ...
US-7,209,848 Pulse stretching architecture for phase alignment for high speed data acquisition
Systems and methods for pulse stretching architectures for phase alignment of multi-frequency clocks for high speed data acquisitions are disclosed. A high speed...
US-7,209,727 Integrated circuit radio front-end architecture and applications thereof
An integrated RF front-end architecture is disclosed. Such an integrated RF front-end architecture includes a multi-tap balun, a low noise amplifier and a power...
US-7,209,333 Apparatus and method for over-voltage, under-voltage and over-current stress protection for transceiver input...
A circuit for protection of a transceiver input includes an input transistor and a first resistor connected between the drain of the input transistor and an...
US-7,208,980 Comparator with offset compensation
A differential comparator with reduced offset. The differential comparator includes a first transistor coupled to a first input current and a second transistor...
US-7,208,776 Fuse corner pad for an integrated circuit
A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive...
US-7,207,806 Low cost coaxial cable connection for wireless antennas
A connection assembly provides an electrical connection from a coaxial cable to planar circuitry. The connection assembly includes an innermost connector node,...
US-7,206,992 Decoding a received BCH encoded signal
A method or apparatus for decoding of a BCH encoded signal begins by determining whether the received BCH encoded signal includes error. The decoding process...
US-7,206,954 Reduced power consumption for embedded processor
An embedded processor system including at least one gated power unit including an internal ROM and a power controller that provides one or more gated power...
US-7,206,879 Systems using mix of packet, coherent, and noncoherent traffic to optimize transmission between systems
An apparatus may include a first system and a second system. The first system includes a first plurality of interface circuits, and each of the first plurality...
US-7,206,740 Efficient excitation quantization in noise feedback coding with general noise shaping
In a Noise Feedback Coding (NFC) system operable in a ZERO-STATE condition and a ZERO-INPUT condition, the NFC system including at least one filter having a...
US-7,206,592 System for coupling a multiplicity of RF data collection terminals with host computer means
Improved apparatus for a radio communication system having a multiplicity of mobile transceiver units selectively in communication with a plurality of base...
US-7,206,564 System and method to perform adaptive channel filtering on a radio frequency burst in a cellular wireless network
A method to perform adaptive channel filtering on a Radio Frequency (RF) bursts in a cellular wireless communication system. This method first filters an input...
US-7,206,366 System and method for programmably adjusting gain and frequency response in a 10-GigaBit ethernet/fibre channel...
Aspects of the invention may provide a method and system for adjusting a gain and/or a frequency response of an input signal for a multimode PHY device. A signal...
US-7,206,337 Bit stream conditioning circuit having output pre-emphasis
A high-speed bit stream interface module interfaces a high-speed communication media to a communication Application Specific Integrated Circuit (ASIC) via a...
US-7,206,327 Method and circuit for insertion of time stamp into real time data
A system for adding a time stamp to transmission traffic on a network comprises a front end processor that receives a packet from the network and generates a...
US-7,205,857 Oscillator with quadrature output in a cross-coupled configuration
An oscillator that provides a quadrature output and has a cross-coupled configuration is disclosed. The oscillator generates an output signal having a frequency....
US-7,205,841 Automatic gain control with three states of operation
A method and apparatus for an automatic gain control (AGC) loop that utilizes freezing and unfreezing states. A freezing process moves the AGC into a TRANSITION...
US-7,205,840 Wideband CMOS gain stage
A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is...
US-7,205,826 Precharged power-down biasing circuit
A power-down biasing circuit including a current source connected to a drain of a first NMOS transistor through a first switch. A gate of the first NMOS...
US-7,205,804 Methods and system for reducing effects of digital loop dead zones
Methods and systems for reducing effects of digital loop dead zones add phase randomness to one or more asynchronous signals that are to be synchronized with a...
US-7,205,792 Methods and circuitry for implementing first-in first-out structure
Methods and circuitry for implementing high speed first-in first-out (FIFO) structures. In one embodiment, a FIFO is disclosed that allows the frequency of one...
US-7,203,827 Link and fall-through address formation using a program counter portion selected by a specific branch address bit
A link address/sequential address generation circuit is provided for generating a link/sequential address. The circuit receives the most significant bits of at...
US-7,203,817 Power consumption reduction in a pipeline by stalling instruction issue on a load miss
A processor is contemplated which includes a queue configured to store one or more instructions and a control circuit coupled to the queue. The control circuit...
US-7,203,800 Narrow/wide cache
A method for transferring data, between a first device and second device in a core processor including a data cache, comprising the steps of, when said first...
US-7,203,526 Wireless user input device providing host link indication
A wireless interface device services communications between a wirelessly enabled host and at least one user input device. The wireless interface device includes...
US-7,203,511 Control of transmit power of a radio frequency integrated circuit
A method for controlling transmit power of a radio frequency integrated circuit begins by sampling a continuous transmit signal strength indication (TSSI) for a...
US-7,203,475 Multiple rate local oscillation generator and applications thereof
A local oscillation generator includes a clock circuit, a first divide module, a first mixing module, a second divide module, and a second mixing module. The...
US-7,203,461 Adaptive channel quality estimation algorithm to support link adaptation
RF communications received by a wireless terminal from a servicing base station are used to determine the channel quality such as reported bit error probability...
US-7,203,248 Impairment sensitive selection of constellation points for communication across a channel
An impairment compensation sequence for use in a communications system susceptible to one or more potential impairments each periodic in an integer number of...
US-7,203,227 All digital reference frequency locking
All digital reference frequency locking. An all digital approach is provided for operation within one or more CMs within a cable modem communication system to...
US-7,203,174 Auto detection of SGMII and GBIC modes
An Ethernet communication system device that switches between SGMII and GBIC modes of operation, without software intervention. For example, a physical layer...
US-7,203,164 Voice architecture for transmission over a shared, contention based medium
A control terminal such as a CMTS is initialized to receive packets of voice calls having parameters including a bit rate, a packetization interval, and a call...
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