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RF diversity antenna coupling structure
AN RF diversity antenna coupling structure includes a differential low noise amplifier, a differential power amplifier, a first switch coupled to a first...
Method for operating an analog to digital converter
Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and...
A pulse on edge circuit includes a first pull up transistor having its gate terminal coupled to a delayed control signal and a second pull up transistor having...
Integrated circuit ground system
An integrated circuit ground system includes an integrated circuit (IC) ground connection, first and second IC package pins, first and second printed circuit...
Via providing multiple electrically conductive paths
A via provides a plurality of electrical connections between conductors on different layers of a circuit board. The via includes an opening through the circuit...
Robust and scalable de-skew method
A method for selectively deskewing data traveling through a bus in a network device is disclosed. Bit-level data is received from each data line of a plurality...
Method and system for performing multi-tests in processors using results
to set a register and indexing based...
A microprocessor, including a plurality of registers and an instruction execution module which is adapted to process a sequence of conditional tests. The module...
Vector/scalar system with vector unit producing scalar result from vector
results according to modifier in...
Described herein is a processor for executing instructions and a method therefor. The processor comprises a scalar unit for executing scalar instructions each...
System and method for caching
Systems and methods that cache are provided. In one example, a system may include a spatial cache system coupled to a processing unit and to a memory. The...
Wireless data communications using FIFO for synchronization memory
A wireless (radio) receiver receives RF signals carrying data synchronized with a first clock. The wireless receiver demodulates the RF signals to extract the...
High frequency peak detector and applications thereof
A high frequency peak detector includes an operational amplifier, a transistor, a capacitor, and an average to peak conversion module. A first inverting input of...
Bad frame indicator for radio telephone receivers
A method for identifying a bad GSM speed frame and simultaneously maintaining a frame erasure rate below a specified value. The method is based upon a joint use...
Methods and circuitry for implementing first-in first-out structure
Methods and circuitry for implementing high speed first-in first-out (FIFO) structures. In one embodiment, a FIFO is disclosed that allows the frequency of one...
Efficient memory allocation scheme for data collection
A system and method that provides an integrated circuit which includes a small on-chip buffer to store collected data, thereby shifting the burden of storing the...
Wireless human interface device host interface supporting both BIOS and OS
A host-side wireless interface services communications between a wireless user input device and a serviced host. The host-side wireless interface includes a...
Method and system for an adaptive multimode media queue
Embodiments of the invention may provide a method for implementing an adaptive multimode media queue. A mode of operation may be determined for a received media...
System, method, and apparatus for division coupled with rounding of signed
A system, method, and apparatus for efficient rounding of signed numbers is presented herein. If the divisor is positive, the dividend is added to one half of...
Edge incremental redundancy support in a cellular wireless terminal
A system for implementing Incremental Redundancy (IR) operations in a wireless receiver includes a baseband processor, an equalizer, a system processor, and an...
Method for opening a proprietary MAC protocol in a non-DOCSIS modem
compatibly with a DOCSIS modem
A two way communication system is adapted for compatible inter-operation of a plurality of devices operating in accordance with a plurality of protocols. The...
Method and system for providing an intelligent switch in a hybrid
wired/wireless local area network
Aspects of the invention provide a system and method for communicating in a hybrid wired/wireless local area network. A method for communicating in a hybrid...
Adaptive gain control based on echo canceller performance information
A system and method for provide a stable gain from an adaptive gain control device in a signal path. An echo canceller is also located in the signal path, and is...
Modulation dependent biasing for efficient and high linearity power
A power amplifier includes a transconductance stage and a modulation detection and bias determination module, and may include a cascode stage. The modulation...
Cable diagnostics using time domain reflectometry and applications using
A system and method are used to determine connectivity and/or cable faults of a cable. A signal transmitting and receiving system is coupled to the cable. An...
Mechanism for processing speculative LL and SC instructions in a pipelined
A processor includes a first circuit and a second circuit. The first circuit is configured to provide a first indication of whether or not at least one...
Compressed audio stream data decoder memory sharing techniques
A decoder (10) decodes compressed data. A memory (44) stores the compressed data and stores operating data and operating code for a plurality of decompression...
Configurable spectral mask for use in a high data throughput wireless
A configurable spectral mask for a channel for use in a wireless communication includes a channel pass region, a floor region, and a transition region. The...
Phase-interpolator based PLL frequency synthesizer
A phase lock loop frequency synthesizer includes a phase rotator in the feedback path of the PLL. The PLL includes a phase detector, a low pass filter, a charge...
Digital phase locked loop for regenerating the clock of an embedded signal
The present invention relates to a system and method for generating a first clock frequency for a plurality of digital data bursts compressed in time, where each...
High speed protocol for interconnecting modular network devices
A network switch for network communications is disclosed. The switch includes a first data port interface, supporting at least one data port transmitting and...
Cable modem termination system
A cable modem termination system including a media access controller, at least one physical layer transceiver in connection with the media access controller for...
Voice and data exchange over a packet based network
A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a...
Signal driving system
A signal driving system generates an output swinging between a first power supply (e.g., about 1.2 Volts), powering first and second drivers, and a second power...
NTSC interference rejection filter
An electronic, programmable filter is disclosed which selectively removes interference, noise or distortion components from a frequency band without perturbing...
Temperature compensated crystal oscillator
An environmental-compensated oscillator includes a reference clock waveform generator; a phase locked loop receiving the reference clock waveform and outputting...
Wide output-range charge pump with active biasing current
A charge pump circuit includes a charge pump having an output voltage. A replica circuit actively matches up and down currents in the charge pump. A charge pump...
High voltage power management unit architecture in CMOS process
A voltage regulator circuit includes a single high voltage regulator, and a plurality of parallel low voltage regulators capable of receiving an intermediate...
Ball grid array package enhanced with a thermal and electrical connector
Electrically, mechanically, and thermally enhanced ball grid array (BGA) packages are described. A substrate has a surface, wherein the surface has an opening...
Low threshold voltage PMOS apparatus and method of fabricating the same
A P-type metal oxide semiconductor (PMOS) device can include an N-well that does not extend completely throughout the active region of the PMOS device. For...
LDPC (low density parity check) coded modulation symbol decoding
LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate...
Firmware code profiling
Disclosed herein are debugging tool(s) for profiling the frequency of execution of certain instructions in a host operation. The debugging tool causes interrupts...
Direct conversion RF transceiver with automatic transmit power control
A single chip radio transceiver includes circuitry that enables received RF signals to be down-converted to baseband frequencies and baseband signals to be...
Dynamic frequency selection in a wireless communication network
A method and apparatus for dynamic frequency selection in a wireless communication system or network includes processing that begins when an access point...
Method and apparatus for parallel decoding of turbo encoded data
A method and apparatus for parallel decoding of turbo encoded data. The method includes multiple Soft In Soft Out (SISO) modules arranged in parallel such that...
Method, apparatus and system for high-speed transmission on fiber optic
Multi-carrier modulation fiber optic systems constructed using a series of electrical carriers, modulating the data on the electrical carriers and combining the...
Adaptive non-linear noise reduction techniques
An impulse-reducing module (200) reduces random noise in video pixels by providing an impulse detector (244) and an impulse reducer, such as a median filter...
Continuous-time delta-sigma ADC with programmable input range
A scaled input current is produced that substantially matches the full scale input of a CT.DELTA..SIGMA.ADC that substantially cancels an offset bias current...
Layout technique for matched resistors on an integrated circuit substrate
Provided a method of reducing impedance variations in an electrical circuit structured and arranged for placement on an integrated circuit (IC) substrate. The...
Power conditioning mechanism using an external card adapter
One or more methods and systems of providing a conditioned power source to an external card that is communicatively connected to a host computing device by way...
Method and apparatus for compensating for frequency offsets caused by a
A transceiver includes a Downstream Signal Processor (DSP), an Upstream Signal Processor (USP), a Local Oscillator (LO), a differencer, a reference signal...
Method of operating a first-in first-out (FIFO) circuit
The present invention provides an overflow detector for a FIFO. The FIFO includes a plurality of registers each having an input and an output, a plurality of...