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Patent # Description
US-7,071,785 Use of a thick oxide device as a cascode for a thin oxide transcoductance device in MOSFET technology and its...
A power amplifier power amplifier includes a transconductance stage and a cascode stage. The transconductance stage that is operable to receive an input voltage...
US-7,071,652 Methods and systems for battery charging control based on CMOS technology
A method and system, compatible with low-voltage CMOS technology, for controlling the charging of a battery. The method includes monitoring a battery voltage...
US-7,069,417 Vector processing system
A vector processing system for executing vector instructions, each instruction defining multiple value pairs, an operation to be executed and a modifier, the...
US-7,068,982 Determination of transmitter distortion
The present invention provides a method for determining nonlinear distortion of a transmitter. A test symbol sequence is transmitted from the transmitter under...
US-7,068,735 System and method to perform DC compensation on a radio frequency burst in a cellular wireless network
A method to perform DC compensation on a Radio Frequency (RF) burst transmitted between a servicing base station and a wireless terminal in a cellular wireless...
US-7,068,728 Carrierless backwards compatible data neworking transmitter, receiver, and signal format
New version packet data devices support a backwards-compatible signal format. New version devices operate within a first frequency band while old version devices...
US-7,068,652 Pointer based binary search engine and method for use in network devices
A network device includes at least one network port, a masks table, a rules table, a pointers table, and a fast filter processor. The masks table contains filter...
US-7,068,611 Method and apparatus for performing diagnostic tests using an assisting transceiver
A method and system for performing diagnostic tests on a communications system. Diagnostic test signals are generated by a transceiver included within the...
US-7,068,609 Method and apparatus for performing wire speed auto-negotiation
Auto-negotiation with a communication partner includes downgrading a set of advertised communications capabilities, e.g., IEEE 802.3 capabilities, when a link...
US-7,068,231 Wide-band tapered-slot antenna for RF testing
Methods and apparatus for testing wireless devices. Devices being tested receive and transmit radio frequency test signals. These radio frequency test signals...
US-7,068,100 Gain control methods and systems in an amplifier assembly
A Variable Gain Amplifier (VGA) amplifies an input signal according to a gain, to produce an amplified signal. A detector module detects a power indicative of a...
US-7,065,695 Metric calculation design for variable code rate decoding of broadband trellis, TCM, or TTCM
Metric calculation design for variable code rate decoding of broadband trellis, TCM (trellis coded modulated), or TTCM (turbo trellis coded modulation). A single...
US-7,065,693 Implementation of test patterns in automated test equipment
An improved automated testing system that decreases the number of test signals that must be stored in the tester pattern memory for a timed test pattern. In the...
US-7,065,148 Super-orthogonal space-time trellis codes, and applications thereof
A super set of space-time block codes is combined with set partitioning to form super-orthogonal space-time trellis codes having full diversity, enhanced coding...
US-7,065,050 Apparatus and method for controlling data flow in a network switch
A method and apparatus for controlling data flow in a network switch, wherein the method includes the steps of determining if a quantity of queued data for a...
US-7,064,610 Differential amplifier with large input common mode signal range
A design for a differential amplifier with a large input common mode signal range. The differential amplifier comprises two differential pairs, each having two...
US-7,064,592 Method and apparatus for numeric optimization of the control of a delay-locked loop in a network device
A method of setting a delay offset in slave Delay-Locked Loop (DLL) modules by a master DLL module is disclosed. The method includes determining whether a delay...
US-7,064,557 Calibration circuit and method for filter bandwidth which is parasitic capacitance sensitive or insensitive
A calibration circuit and method causes a cutoff frequency to match the design frequency of low pass filter by adjusting a capacitor array in the low pass filter.
US-7,062,700 16 QAM and 16 APSK TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3 bit/s/Hz using...
16 QAM (Quadrature Amplitude Modulation) and 16 APSK (Asymmetric Phase Shift Keying) TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3...
US-7,062,693 Methodology for selectively testing portions of an integrated circuit
A method and apparatus are disclosed for easily reconfiguring a scan chain test of a subset of scan blocks within a digital integrated circuit chip. To mitigate...
US-7,062,657 Methods and apparatus for hardware normalization and denormalization
Methods and apparatus are provided for efficiently normalizing and denormalizing data for cryptography processing. The normalization and denormalization...
US-7,062,595 Integrated gigabit ethernet PCI-X controller
A network controller having a multiprotocol bus interface adapter coupled between a communication network and a computer bus, the adapter including a predictive...
US-7,061,874 Method, system and computer program product for classifying packet flows with a bit mask
Classification of packets into flows is an inherent operation performed by networks that support enhanced services. To support multiple-dimensional packet...
US-7,061,417 Method and system for increased effective resolution in an N-bit digital-to-analog converter
In digital-to-analog conversion systems, a method and system for increased effective resolution in an N-bit DAC are provided. Additional resolution may be...
US-7,061,318 System and method for a startup circuit for a differential CMOS amplifier
A system is provided for correcting start-up deficiencies in an amplifier. The system includes a comparing device configured to (i) receive a second circuit node...
US-7,061,279 System and method for high frequency, high output swing buffers
Methods and systems for increasing gain for an electric circuit may include receiving an input differential signal at a first configured pair of transistors and...
US-7,058,881 Distributed 4-bits diagonal interleaved parity (DIP4) checker
A logic circuit includes an interface and an error detection unit. The interface is configured to receive and transmit a data stream, wherein the data stream...
US-7,058,868 Scan testing mode control of gated clock signals for memory devices
Circuits and methods to enhance scan testing by controlling clock pulses that are provided to memory devices within an integrated circuit are provided. An...
US-7,058,803 System and method for protecting transport stream content
Systems and methods that protect transport stream content are disclosed. The system may include a first module and a second module, the first module having a...
US-7,058,150 High-speed serial data transceiver and related methods
A high-speed serial data transceiver includes multiple receivers and transmitters for receiving and transmitting multiple analog, serial data signals at...
US-7,057,664 Method and system for converting interlaced formatted video to progressive scan video using a color edge...
Aspects of the invention for converting interlace formatted video to progressive scan video, may include a color edge detector block (306) adapted to determined...
US-7,057,627 Video and graphics system with square graphics pixels
A video and graphics system provides square graphics pixels to blend images having 640.times.480 pixels, such as graphics images provided by some set top boxes...
US-7,057,622 Graphics display system with line buffer control scheme
A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video...
US-7,057,466 Varactor-based ring oscillator
A varactor-based ring oscillator to produce an output signal and method therefore are disclosed. The ring oscillator includes a first phase shift circuit having...
US-7,057,465 Low offset and low glitch energy charge pump and method of operating same
A high precision charge pump used in a phase-lock-loop incorporating a phase/frequency detector is designed and constructed to substantially eliminate the...
US-7,055,085 System and method for protecting header information using dedicated CRC
Systems and methods that protect heading information using a dedicated cyclic redundancy check (CRC) are provided. In one embodiment, a method that transmits a...
US-7,054,998 File mode RAID subsystem
A method and system enables data redundancy across servers, networks, and controllers by using standard redundant files as underlying storage for RAID subsystem...
US-7,054,977 Method of handling data in a network device
A network device for handling data and a method for handling data in a network device are disclosed. The network device includes at least one media port and at...
US-7,054,805 Method and system for allocating memory during encoding of a datastream
Certain embodiments of the invention provide a method and system for allocating memory during encoding of an uncompressed information stream. A method for...
US-7,054,779 System and method for detecting a device requiring power
A system and technique for detecting a device that requires power is implemented with a power detection station. The power detection system includes a detector...
US-7,054,603 RF integrated circuit with signal gain adjustment
A method and apparatus for signal gain adjustment within an RF integrated circuit (IC) include processing that begins by determining the signal strength of a...
US-7,054,379 Data scrambler generation of pseudo-random bit sequence for semi-stationary Q-mode signal
In a data communication system, a transmitter of a modem, for example, uses a single scrambler to operate in a data communication mode and in a non-data mode....
US-7,054,279 Method and apparatus for optimizing signal transformation in a frame-based communications network
A method of and apparatus for optimizing signal transformation from a twisted pair transmission line to a combination transmitter and receiver for a frame-based...
US-7,054,212 Sense amplifier with adaptive reference generation
A digital memory system (30) includes a memory cell (52), a bit line (50), a transfer gate (60) a reference voltage generator (40), a sense amplifier (70) and a...
US-7,053,768 Detecting communications disconnect and enabling wireless emergency call
A process of detecting and communicating alarm events by a security system is disclosed. Sensors in communication with the security system are monitored, where...
US-7,053,720 Configurable voltage controlled oscillator system and method including dividing forming a portion of two or...
A phase lock loop with multiple divider paths is presented herein. The phase lock loop can be used to provide a wide range of frequencies. The phase lock loop...
US-7,053,715 Gigabit Ethernet transceiver with analog front end
Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain...
US-7,053,707 Method and system for implementing autonomous automatic gain control in a low noise broadband distribution...
Provided is a system for implementing gain control in an amplification module comprising a first stage amplifier having a number of first stage input and output...
US-7,053,697 System for tuning a corner frequency of a low pass filter
An integrated circuit formed on a semiconductor chip, comprising a low pass filter circuit having a first resistor of a first resistance value and a capacitor of...
US-7,050,778 Direct conversion turner
A direct conversion tuner down-converts television signals, cable signals, or other signals directly from an RF frequency to an IF frequency and/or baseband,...
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