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Patent # Description
US-6,996,757 Test system rider board utilized for automated at-speed testing of high serial pin count multiple gigabit per...
A test head performs at-speed testing of high serial pin count gigabit per second (GBPS) devices. The test head includes a device under test (DUT) coupled to a...
US-6,996,738 Robust and scalable de-skew method for data path skew control
A method for selectively deskewing data traveling through a bus in a network device is disclosed. Bit-level data is received from each data line of a plurality...
US-6,996,379 Linear high powered integrated circuit transmitter
A linear high powered integrated circuit transmitter includes an up-conversion module, a plurality of power amplifiers, balanced integrated circuit coupling, and...
US-6,996,128 Cable modem system with sample and packet synchronization
A method and system of processing sampled voice packets from a voice packet sender for transmission over a bit-rate sampled data transmission system, such as by...
US-6,996,099 Network switch having a programmable counter
A network switch for switching packets from a source to a destination includes a source port for receiving an incoming packet from a source, a destination port...
US-6,995,696 System, method, and apparatus for variable length decoder
Presented herein is a system, method, and apparatus for decoding variable length codes. In one embodiment, there is presented a method for decoding variable...
US-6,995,625 Oscillator with quadrature output in a cross-coupled configuration
An oscillator that provides a quadrature output and has a cross-coupled configuration is disclosed. The oscillator generates an output signal having a frequency....
US-6,995,620 Oscillator having multi-phase complementary outputs
An oscillator having multi-phase complementary outputs comprises a first plurality of single ended amplifiers connected in series to form an input and an output...
US-6,995,616 Power amplifier having cascode architecture with separately controlled MOS transistor and parasitic bipolar...
A power amplifier includes a transconductance stage, a cascode stage, and may include a signal level detection and bias determination module. The ...
US-6,995,600 Fast and wire multiplexing circuits
An apparatus for a multiplexor circuit includes a passgate circuit coupled to receive input signals and corresponding select signals comprising a subset of the...
US-6,995,594 Phase interpolator device and method
A high-speed serial data transceiver includes multiple receivers and transmitters for receiving and transmitting multiple analog, serial data signals at...
US-6,995,586 Monotonic leakage-tolerant logic circuits
An improved logic methodology that combines the speed advantages of dynamic logic with the low contention of static logic, such that the logic circuits are not...
US-6,995,431 System and method to reduce noise in a substrate
Certain embodiments of the invention may be found in, for example, a system that reduces noise in a substrate of a chip and may comprise a substrate and a first...
US-6,993,632 Cache coherent protocol in which exclusive and modified data is transferred to requesting agent from snooping agent
A system may include two or more agents, at least some of which may cache data. In response to a read transaction, a caching agent may snoop its cached data and...
US-6,993,631 L2 cache maintaining local ownership of remote coherency blocks
A first node includes a first cache and a plurality of coherent agents. In response to a transaction to a coherency block by a first coherent agent of the...
US-6,993,544 Limit-cycle oscillation suppression method, system, and computer program product
Limit-cycle oscillations are caused by the compounding of quantization errors that occurs when previous digital filter outputs are used as inputs to the digital...
US-6,993,306 Determination and processing for fractional-N programming values
Determination and processing for fractional-N programming values. The present invention is operable to receive a clock signal (CLK) and to transform that CLK...
US-6,993,106 Fast acquisition phase locked loop using a current DAC
In a phase locked loop in which a phase detector compares an input signal to a reference signal and provides a difference signal to a charge pump or to a...
US-6,993,101 Method of determining a start of a transmitted frame in a frame-based communications network
A method of determining a start of a transmitted frame at a receiver on a frame-based communications network. A received transmitted frame is filtered using...
US-6,993,027 Method for sending a switch indicator to avoid out-of-ordering of frames in a network switch
A method for preventing out-of-ordering of frames in a network switch, wherein the method includes the steps of receiving a first portion of a string of packets...
US-6,993,007 System and method for suppressing silence in voice traffic over an asynchronous communication medium
A method and system for increasing the efficiency of providing bandwidth for voice traffic to a data provider via asynchronous communication mediums is provided....
US-6,992,604 Method and system for converting digital samples to an analog signal
Provided is a system and method for converting digital data audio data audio data that has a predetermined input sample rate, into an analog data signal. A...
US-6,990,566 Multi-channel bi-directional bus network with direction sideband bit for multiple context processing elements
A method and an apparatus for configuration of multiple context processing elements (MCPEs) are described. The method and an apparatus is capable of selectively...
US-6,990,195 Voice and data exchange over a packet based network with resource management
A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a...
US-6,990,143 50% duty-cycle clock generator
A method and apparatus for generating a fifty percent duty cycle clock from a reference clock. The method and apparatus includes an edge generator, a...
US-6,990,090 Radio frequency local area network
An apparatus and a method for routing data in a radio data communication system having one or more host computers, one or more intermediate base stations, and...
US-6,990,020 Non-volatile memory cell techniques
A non-volatile memory cell (10) includes a charge-storing node (16). An electrically insulating first layer (76) is coupled between the node and a source of a...
US-6,989,715 One-level zero-current-state exclusive or (XOR) gate
Aspects of the invention provide a fast one level zero-current-state XOR gate. An embodiment of the invention provides a first pair of differentially configured...
US-6,989,705 High linearity passive mixer and associated LO buffer
An RF communications system includes a transmit node for transmitting an RF information signal and a receive node for receiving the transmitted RF information...
US-6,989,691 Dynamic to static converter with noise suppression
An apparatus is disclosed which includes a converter circuit and a noise suppression circuit. The converter circuit has a dynamic logic input, and is configured...
US-6,989,593 Die-up ball grid array package with patterned stiffener opening
An electrically and thermally enhanced die-up tape substrate ball grid array (BGA) package and die-up plastic substrate BGA package are described. A substrate...
US-6,988,236 Method for selecting frame encoding parameters in a frame-based communications network
A method for selecting frame encoding parameters to improve transmission performance for a transmitting frame being transmitted from a transmitting station to a...
US-6,988,177 Switch memory management using a linked list structure
A memory management method that has the steps of assigning pointers to free memory locations and linking the pointers to one another creating a linked list of...
US-6,988,168 Cache programmable to partition ways to agents and/or local/remote blocks
A cache comprises a memory including a plurality of entries and a circuit. Each entry of the plurality of entries is configured to store a cache block. The...
US-6,988,115 Method and apparatus to correct leading one prediction
A leading one correction circuit receives a significand from a floating point adder and a corresponding leading one prediction from a leading one predictor, and...
US-6,987,966 Adaptive radio transceiver with polyphase calibration
An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local...
US-6,987,821 Voice and data exchange over a packet based network with scaling error compensation
A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a...
US-6,987,737 Performance indicator for a high-speed communication system
A method and apparatus for generating a performance indicator in a high-speed communication system. A plurality of disparate communication status signals with...
US-6,987,476 Method for matching rise and fall times of drive signals in a digital to analog converter
A system (e.g., a digital-to-analog converter (DAC)) includes a digital section and an analog section. The digital section has a driver portion that generates...
US-6,986,025 Conditional execution per lane
A computer system for conditionally performing an operation defined in a computer instruction, an execution unit of the computer system comprises at least one...
US-6,985,853 Compressed audio stream data decoder memory sharing techniques
A decoder (10) decodes compressed data. A memory (44) stores the compressed data and stores operating data and operating code for a plurality of decompression...
US-6,985,755 Reduced power consumption wireless interface device
A wireless interface device services communications between a wirelessly enabled host and at least one user input device. The wireless interface device includes...
US-6,985,708 Linearized fractional-N synthesizer having a gated offset
A linearized oscillation synthesizer includes a phase and frequency detection module, charge pump circuit, low pass filter, voltage control oscillator, and a...
US-6,985,705 Radio frequency control for communication systems
The present invention provides for a system and method for improvement of radio transmitter and receiver frequency accuracy for a local radio communication unit...
US-6,985,565 Configurable DSL modem for high bit rates
A method for configuring a multi-port digital subscriber line (DSL) modem, the method begins by utilizing frequency bands of a single DSL channel to support a...
US-6,985,492 Voice gateway with voice synchronization
A network gateway is configured to facilitate on line and off line bi-directional communication between a number of near end data and telephony devices with far...
US-6,985,387 System and method for one-time programmed memory through direct-tunneling oxide breakdown
A one-time programming memory element, capable of being manufactured in a 0.13 .mu.m or below CMOS technology, having a capacitor, or transistor configured as a...
US-6,985,093 Interspersed training for turbo coded modulation
A communications system, having a combination Reed-Solomon encoder and a Turbo-Code encoder Data frame configuration which may be changed to accommodate embedded...
US-6,985,044 Varactor folding technique for phase noise reduction in electronic oscillators
A varactor folding technique reduces noise in controllable electronic oscillators through the use of a series of varactors having relatively small capacitance. A...
US-6,985,035 System and method for linearizing a CMOS differential pair
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides...
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