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Independent reset of arbiters and agents to allow for delayed agent reset
A system includes two or more agents and a distributed arbitration scheme for the bus to which the agents are connected. Thus, an arbiter corresponding to each...
Mixer having low noise, controllable gain, and/or low supply voltage
A mixer includes a reference current source, a programmable gain RF transconductance section or an RF transconductance section, switching quad native transistors...
System and method for on-chip filter tuning
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front...
Pair-swap independent trellis decoder for a multi-pair gigabit transceiver
A method and a system for compensating for a permutation of L pairs of cable such that the compensation is localized in a trellis decoder of a receiver. The L...
State delayed technique and system to remove tones of dynamic element
A filter structure used with a dynamic element matching encoder for a sigma-delta digital-to-analog converter is presented. A sampled input sequence having...
Method and apparatus for efficient mixed signal processing in a digital
A system and method of creating a highly efficient digital amplifier which can take either analog or digital inputs, and produce a high power accurate...
Hardware efficient implementation of finite impulse response filters with
limited range input signals
Disclosed herein is a method and system to reduce the area and power dissipation in digital filters or multipliers. Compared to radix-4 Booth coding the proposed...
Configurable voltage controlled oscillator system and method
A phase lock loop with multiple divider paths is presented herein. The phase lock loop can be used to provide a wide range of frequencies. The phase lock loop...
Methods and systems for limiting supply bounce
Methods and systems for limiting power supply and ground bounce enables control of the output current drive dependent on the changes in supply (VDD and GND)...
High-swing transconductance amplifier
A charge pump circuit includes a high-swing transconductance amplifier. A high input swing transconductance is provided in a negative feedback loop of the charge...
A decode circuit for selecting one of a plurality of output lines in dependence on the status of a plurality of input lines, the circuit comprising: a first...
Layout technique for C3MOS inductive broadbanding
An improved cell layout for a C3MOS circuit with inductive broadbanding positions the inductor at a distance from the active region to improve isolation and...
Token-based receiver diversity
A token-based receiver diversity processing is described. In one embodiment, a receiver diversity comprises repeaters receiving wirelessly transmitted packets...
Billing control methods in wireless hot spots
A process of billing for access to and use of a wireless hotspot by a portable device is disclosed. A signal from the wireless hotspot is detected and access to...
Programmable gain amplifier (PGA) with AGC in receiver section
A method and apparatus for dynamically controlling a programmable gain amplifier (PGA) to provide a plurality of gain steps thereby providing automatic gain...
System and method for providing power over a home phone line network
A system and method is provided for supplying power over a home phone line network in a manner that is interoperable with other voice and data services operating...
Efficient column redundancy techniques
The present invention relates to a system and method adapted to increase memory cell and memory architecture design yield. The present invention includes memory...
Methods and systems for improving ESD clamp response time
The present invention relates to electrostatic discharge (ESD) protection and, more particularly, to methods and systems for improving response times of ESD...
Eccentric spiral antenna and method for making same
A system includes a support device and an elongated spiral antenna coupled to the support device. The elongated spiral antenna has a contracted portion and an...
Switched capacitor circuits
A switched capacitor circuit having an integrator, a switch, a capacitor, a field effect transistor, and a network. The switch is connected to the integrator....
System and method for measuring the power consumed by a circuit on a
printed circuit board
A system for measuring power of a circuit on a printed circuit board (PCB) including first and second circuits, a power strip, a power plane, and a calibration...
Ball grid array package with multiple interposers
Electrically, thermally and mechanically enhanced ball grid array (BGA) packages are described. An IC die is mounted to a first surface of a first stiffener. A...
Method for identifying basic blocks with conditional delay slot
A first tag is assigned to a branch instruction. Dependent on the type of branch instruction, a second tag is assigned to an instruction in the branch delay slot...
Signal gain adjustment within an RF integrated circuit
A method and apparatus for signal gain adjustment within an RF integrated circuit (IC) include processing that begins by determining the signal strength of a...
Network switch with high-speed serializing/deserializing hazard-free double
data rate switching
A network switch having an internet port interface controller, includes a high performance interface for communicating with other switches and components through...
Circuit for lines with multiple drivers
An apparatus may include at least a first transistor, a second transistor, and a circuit. The first transistor has a first control terminal coupled to receive a...
Scaling adjustment to enhance stereo separation
A demodulator (10) converts television signals to video baseband signals and audio baseband signals including stereo signals representing a right channel signal...
Method to overlay a secondary communication channel onto an encoded primary
Disclosed herein is a method for processing information in a primary communication channel. The method may include encoding at least one portion of at least one...
I/O circuit using low voltage transistors which can tolerate high voltages
even when power supplies are powered off
An apparatus for providing bias voltages for input/output (I/O) connections on low voltage integrated circuits. In one embodiment, the invention comprises an I/O...
Methods and systems for providing load-adaptive output current drive
Methods and systems for sensing load conditions and for adjusting output current drive according to the sensed load conditions to maintain one or more signal...
Multi-concentric pad arrangements for integrated circuit pads
Multi-concentric pad (MCP) arrangements provide for increased pad densities on integrated circuits. The multi-concentric pad (MCP) configuration includes a first...
Hacker-proof one time programmable memory
A one time programmable memory circuit includes a one time programmable memory array. A write circuit outputs data to the one time programmable memory array. A...
Method and system for a multi-rate analog finite impulse response filter
Provided are a system and method for implementing a multirate analog finite impulse response (FIR) filter. A system of the present invention includes a modulator...
Method to reduce unwanted oscillations in high speed, high gain or
A system reduces unwanted oscillations in a multiple gigabit per second, high gain amplifier portion. The system includes a power source portion having a pluraty...
Sub-micron high input voltage tolerant input output (I/O) circuit
A method of providing bias voltages for input output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the...
5 Volt tolerant IO scheme using low-voltage devices
Systems and methods are disclosed for operating a core circuitry of an integrated circuit at a lower voltage than the coupled IO circuitry using a tolerant...
Video, audio and graphics decode, composite and display system
A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section...
Antenna with a magnetic interface
An antenna includes a magnetic interface generator that generates a magnetic interface at a center frequency f.sub.0. The magnetic interface generator is a...
Programmable dual mode hysteretic power output controller
A power output controller includes an output stage, a sensing circuit that compares an output voltage of the output stage with a reference voltage, and a digital...
Die-down ball grid array package with die-attached heat spreader and method
for making the same
An apparatus, system, and method for assembling a ball grid array (BGA) package is described. A stiffener/heat spreader is provided. A substrate has a first...
Adaptive flow control method and apparatus
The present invention provides a method of controlling data flow within a network device. The method includes the steps of snooping a data packet before the data...
Adaptive retry mechanism
An adaptive retry mechanism may record latencies of recent transactions (e.g. the first data transfer latency), and may select a retry latency from two or more...
Switch having flow control management
A method of flow control management of data packets in a switch. The method has the steps of determining each time data is being written to memory in order to...
Method and apparatus for generating a self-correcting local oscillation
A method and apparatus for generating a self-correcting local oscillation includes processing that begins by generating a synthesized frequency from a reference...
Voice and data exchange over a packet based network with timing recovery
A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a...
Linked network switch configuration
A network device includes a first switch, a second switch, address resolution logic (ARL), and a CPU. The first and second switch having a groups of ports which...
A network switch for switching packets from a source to a destination includes a source port for receiving an incoming packet from a source, a destination port...
Hierarchical data collection network supporting packetized voice
communications among wireless terminals and...
A packet-based, hierarchical communication system, arranged in a spanning tree configuration, is described in which wired and wireless communication networks...
Off-line broadband network interface
A network interface is presented that receives packet data from a shared medium and accomplishes the signal processing required to convert the data packet to...
Power supply for controlled parallel charging and discharging of batteries
A power supply and switching technique is provided that utilizes a first battery and a second battery to charge a load. The power supply includes a first...