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Patent # Description
US-6,720,799 Replica network for linearizing switched capacitor circuits
The present invention relates to a replica network for linearizing switched capacitor circuits. A bridge circuit with a MOSFET resistor disposed in a resistor...
US-6,720,798 Class AB digital to analog converter/line driver
A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors...
US-6,720,795 Active termination network
An active termination for a transmission line comprising a reference impedance, a terminating impedance and a control circuit. The reference and terminating...
US-6,720,757 Variable gain received signal strength indicator
An RSSI circuit provides a relatively inexpensive technique for accurately measuring received signal strength over a wide dynamic range. A received signal is...
US-6,718,458 Method and apparatus for performing addressing operations in a superscalar, superpipelined processor
A method and apparatus for improving the performance of a superscalar, superpipelined processor by identifying and processing instructions for performing...
US-6,717,863 Transparent continuous refresh RAM cell architecture
A system-on-chip (SOC) device or a random access memory (RAM) chip includes a RAM block. The RAM block includes memory cells, each of which has three ...
US-6,717,442 Dynamic to static converter with noise suppression
An apparatus is disclosed which includes a converter circuit and a noise suppression circuit. The converter circuit has a dynamic logic input, and is configured...
US-6,714,983 Modular, portable data processing terminal for use in a communication network
A portable data terminal includes at least two communication transceivers having different operating characteristics, one for conducting data communications on a...
US-6,714,608 Multi-mode variable rate digital satellite receiver
Carrier signals are modulated by information (e.g., television) signals in a particular frequency range. The information signals are oversampled at a first...
US-6,714,559 Redundant radio frequency network having a roaming terminal communication protocol
Disclosed herein is a redundant network and communication protocol at least including host computers, RF base stations, and roaming terminals. The network may...
US-6,714,467 Block redundancy implementation in heirarchical RAM's
The present invention relates to a system and method for providing redundancy in a hierarchically memory, by replacing small blocks in such memory. The present...
US-6,714,150 Digital to analog converter with reduced ringing
Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and...
US-6,714,080 Low voltage input current mirror circuit and method
A low voltage current mirror circuit (also referred to as a bias circuit) for establishing a plurality of bias voltages from an input current supplied to an...
US-6,714,062 Method and apparatus for a limiting amplifier with precise output limits
A circuit and a method for limiting a voltage to a specified value (e.g., a rail voltage) without clipping thereby includes a pair of MOSFETs that turn on when a...
US-6,714,056 Frequency division/multiplication with jitter minimization
A method and system described for producing frequency multiplication/division by any non-integer output signal frequency relative to a reference signal frequency...
US-6,714,026 System and method for measuring the thickness or temperature of a circuit in a printed circuit board
System for measuring a thickness of a circuit component on a printed circuit board (PCB). The system includes a first circuit, a power plane, a power strip, a...
US-6,711,227 Synchronizing method and apparatus
To synchronize a regularly occurring pulse train to the average of a bunched pulse train, an oscillator generates a plurality of differently phase shifted...
US-6,711,087 Limited swing driver circuit
A limited swing driver with a pass transistor coupled between a memory cell and an associated bitline; an inverter, its output coupled to the gate of the pass...
US-6,710,644 Low pass filter corner frequency tuning circuit and method
An integrated circuit formed on a semiconductor chip, comprising a low pass filter circuit having a first resistor of a first resistance value and a capacitor of...
US-6,710,628 Single-ended sense amplifier with sample-and-hold reference
A sense amplifier having a sampling circuit to sample the amplifier input signal; a reference node storing a reference signal corresponding to the input signal;...
US-6,709,977 Integrated circuit having oversized components and method of manafacture thereof
An integrated circuit includes electrical components that include one or more electrical elements on one or more dielectric layers. The electrical element has a...
US-6,707,848 Demodulator for a multi-pair gigabit transceiver
A feedforward equalizer for equalizing a sequence of signal samples received by a receiver from a remote transmitter. The feedforward equalizer has a gain and is...
US-6,707,818 Network switch memory interface configuration
A network switch for network communications includes a first data port interface, wherein the first data port interface supports a plurality of data ports for...
US-6,707,817 Method for handling IP multicast packets in network switch
A method of switching packets in a network switch includes the step of receiving a packet on a source port of a network switch. Thereafter, the method includes...
US-6,707,696 Hacker-proof one time programmable memory
A one time programmable memory circuit includes a one time programmable memory array. A write circuit outputs data to the one time programmable memory array. A...
US-6,707,367 On-chip multiple tap transformer and inductor
An on-chip multiple tap transformed balun includes a 1.sup.st winding and a 2.sup.nd winding having two portions. The 1.sup.st winding is on a 1.sup.st layer of...
US-6,707,327 Frequency dividing circuit
A frequency dividing circuit divides a master clock frequency by a non-integer factor to provide an output clock signal whose frequency is equal to the frequency...
US-6,707,316 Circuit technique for high speed low power data transfer bus
A high speed low power data transfer bus circuit that reduces bus power consumption by imposing a limited, controlled voltage swing on the associated data bus....
US-6,704,236 Method and apparatus for verification of a gate oxide fuse element
A method and circuit for verifying the state of a gated fuse element used with a one-time programmable CMOS memory device. A first expected state is set and a...
US-6,703,865 Line-driver with power down loopback protection
A line driver selectively drives one of two transmission lines. The line driver includes a differential amplifier connected to first and second differential...
US-6,700,899 Bit slice arbiter
An arbiter circuit is provided for resolving a plurality of N request signals received from a plurality of agents requesting access to a resource. The arbiter...
US-6,700,894 Method and apparatus for shared buffer packet switching
A shared buffer packet switching device is provided for receiving data packets via associated ones of a plurality of receive ports, and for transmitting data...
US-6,700,588 Apparatus and method for blending graphics and video surfaces
A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video...
US-6,700,176 MOSFET anti-fuse structure and method for making same
An anti-fuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A channel is formed between the source and drain...
US-6,697,975 Generalized convolutional interleaver/deinterleaver
A memory-efficient convolutional interleaver/deinterleaver with a memory array, a write commutator, and a read commutator wherein the commutators perform their...
US-6,697,918 Cache configured to read evicted cache block responsive to transmitting block's address on interface
A cache is configured to select a cache block for eviction in response to detecting a cache miss. The cache transmits the address of the cache block as a write...
US-6,697,415 Spread spectrum transceiver module utilizing multiple mode transmission
A data transceiver module for digital data communications in a portable hand-held data terminal has multiple data spread spectrum modes which include direct...
US-6,697,005 Analog to digital converter with interpolation of reference ladder
An N-bit analog to digital converter includes a reference ladder connected to an input voltage at one end, and to ground at another end, an array of differential...
US-6,696,898 Differential crystal oscillator
A periodic signal generation circuit includes a differential crystal oscillator suitable for integration on a semiconductor substrate. The oscillator utilizes an...
US-6,696,893 Extended range variable gain amplifier
An extended range variable gain amplifier is described. The variable gain capability is achieved by replacing differential pair amplifiers having an input signal...
US-6,696,892 Large dynamic range programmable gain attenuator
A design of integrated circuit components to prevent accidental turn on when large input signals are accepted. With integrated circuits operated at lower power...
US-6,696,854 Methods and circuitry for implementing first-in first-out structure
Methods and circuitry for implementing high speed first-in first-out (FIFO) structures. In one embodiment, a FIFO is disclosed that allows the frequency of one...
US-6,693,917 Digital subchannel transceiver for transmitting data
A system for transmitting subchannel data over the same media as high speed data, especially DC balanced high speed data. A digital transmitter receives...
US-6,693,819 High voltage switch circuitry
The present invention relates to a high voltage switch used with a one-time programmable memory device and a method of setting a state of a one-time programmable...
US-6,693,566 Interspersed training for turbo coded modulation
A communications system, having a combination Reed-Solomon encoder and a Turbo-Code encoder Data frame configuration which may be changed to accommodate embedded...
US-6,693,476 Differential latch and applications thereof
A differential latch includes a sample transistor section, a hold transistor section, a 1.sup.st gating circuit and a 2.sup.nd gating circuit. The sample...
US-6,693,475 System and method for compensating for supply voltage induced clock delay mismatches
Various systems and methods providing signal delay compensation for circuits such as a multi-pair gigabit Ethernet transceiver are disclosed. In an analog...
US-6,690,753 Receiver having decisional feedback equalizer with remodulation and related methods
A receiver includes a filter for filtering a received signal to produce a filtered signal. A converter converts the filtered signal to a baseband signal that is...
US-6,690,742 Adaptively configurable class-A/class-B transmit DAC for transceiver emission and power consumption control
A power efficient and reduced electromagnetic interference (EMI) emissions transmitter for unshielded twisted pair (UTP) data communication applications....
US-6,690,726 Video encoding and video/audio/data multiplexing device
A buffer architecture and latency reduction mechanism for buffering uncompressed/compressed information. This combination provides for a proficient division of...
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